Universal Remote Control R7 - SPECS SHEET Manuel d'utilisateur Page 46
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ADP5589 Data Sheet
Rev. B | Page 46 of 52
PIN_CONFIG_D Register 0x4C
Table 84. PIN_CONFIG_D Bit Descriptions
Bits Name R/W Description
7 PULL_SELECT R/W 0 = 300 kΩ used for row pull-up during key scanning.
1 = 100 kΩ used for row pull-up during key scanning.
6 C4_EXTEND_CFG R/W 0 = C4 remains configured as GPIO 13.
1 = C4 reconfigured as RESET2 output.
5 R4_EXTEND_CFG R/W 0 = R4 remains configured as GPIO 5.
1 = R4 reconfigured as RESET1 output.
4 C6_EXTEND_CFG R/W 0 = C6 remains configured as GPIO 15.
1 = C6 reconfigured as LC2 input for Logic Block 2.
[3:2] R3_EXTEND_CFG[1:0] R/W 00 = R3 remains configured as GPIO 4.
01 = R3 reconfigured as LC1 input for Logic Block 1.
10 = R3 reconfigured as PWM_OUT/CLK_OUT outputs from PWM and clock divider blocks.
11 = unused.
1 C9_EXTEND_CFG R/W 0 = C9 remains configured as GPIO 18.
1 = C9 reconfigured as LY2 output from Logic Block 2.
0 R0_EXTEND_CFG R/W 0 = R0 remains configured as GPIO 1.
1 = R0 reconfigured as LY1 output from Logic Block 1.
ADP5589AC_Z-00-R7, ADP5589AC_Z-02-R7 Default = 0000 0000
ADP5589AC_Z-01-R7 Default = 0010 0000
GENERAL_CFG_B Register 0x4D
Table 85. GENERAL_CFG_B Bit Descriptions
Bits Name R/W Description
7 OSC_EN R/W 0 = disable internal 1 MHz oscillator.
1 = enable internal 1 MHz oscillator.
[6:5] CORE_FREQ[1:0] R/W Sets the input clock frequency fed from the base 1 MHz oscillator to the digital core. Slower
frequencies result in less I
DD
. However, key and GPI scan times increase.
00 = 50 kHz.
01 = 100 kHz.
10 = 200 kHz.
11 = 500 kHz.
4 LCK_TRK_LOGIC R/W 0 = allow logic outputs (programmed for FIFO updates) to be tracked on the FIFO if the keypad is
locked.
1 = do not track.
3 LCK_TRK_GPI R/W 0 = allow GPIs (programmed for FIFO updates) to be tracked on the FIFO if the keypad is locked.
1 = do not track.
2 Unused
1
INT
_CFG
R/W
Configure the behavior of the
INT
pin if the user tries to clear it while an interrupt is pending.
0 =
INT
pin remains asserted if an interrupt is pending.
1 =
INT
pin deasserts for 50 µs and reasserts if an interrupt is pending.
0
RST
_CFG
R/W
Configure the response ADP5589 has to the
RST
pin.
0 = ADP5589 resets if
RST
is low.
1 = ADP5589 does not reset if
RST
is low.
- ADP5589 1
- TABLE OF CONTENTS 2
- SPECIFICATIONS 3
- ABSOLUTE MAXIMUM RATINGS 5
- QUICK DEVICE OVERVIEW 7
- 9714-004 7
- DEVICE ENABLE 8
- DEVICE OVERVIEW 8
- EVENT FIFO 9
- KEY SCAN CONTROL 9
- Rev. B 10
- KEY PRESSED 10
- 09714-009 10
- Data Sheet ADP5589 11
- ADP5589 Data Sheet 12
- Key Pad Extension 12
- Ghosting 12
- FIFO Lock/Unlock 12
- GPI Input 15
- REGISTER INTERFACE 19
- REGISTER MAP 21
- ID Register 0x00 23
- INT_STATUS Register 0x01 23
- Status Register 0x02 23
- FIFO_1 Register 0x03 24
- Rev. B 25
- Rev. B 26
- GPI_INT_STAT_A Register 0x13 27
- GPI_INT_STAT_B Register 0x14 27
- GPI_INT_STAT_C Register 0x15 27
- GPI_STATUS_A Register 0x16 28
- GPI_STATUS_B Register 0x17 28
- GPI_STATUS_C Register 0x18 28
- RPULL_CONFIG_A Register 0x19 29
- RPULL_CONFIG_B Register 0x1A 29
- RPULL_CONFIG_C Register 0x1B 30
- RPULL_CONFIG_D Register 0x1C 30
- RPULL_CONFIG_E Register 0x1D 31
- GPI_EVENT_EN_A Register 0x21 32
- GPI_EVENT_EN_B Register 0x22 33
- GPI_EVENT_EN_C Register 0x23 33
- DEBOUNCE_DIS_A Register 0x27 35
- DEBOUNCE_DIS_B Register 0x28 35
- DEBOUNCE_DIS_C Register 0x29 36
- GPO_DATA_OUT_A Register 0x2A 36
- GPO_DATA_OUT_B Register 0x2B 36
- GPO_DATA_OUT_C Register 0x2C 37
- GPO_OUT_MODE_A Register 0x2D 37
- GPO_OUT_MODE_B Register 0x2E 37
- GPO_OUT_MODE_C Register 0x2F 38
- UNLOCK1 Register 0x33 39
- UNLOCK2 Register 0x34 39
- EXT_LOCK_EVENT Register 0x35 39
- UNLOCK_TIMERS Register 0x36 40
- LOCK_CFG Register 0x37 40
- RESET1_EVENT_A Register 0x38 40
- RESET1_EVENT_B Register 0x39 40
- RESET1_EVENT_C Register 0x3A 41
- RESET2_EVENT_A Register 0x3B 41
- RESET2_EVENT_B Register 0x3C 41
- RESET_CFG Register 0x3D 41
- PWM_OFFT_LOW Register 0x3E 42
- PWM_OFFT_HIGH Register 0x3F 42
- PWM_ONT_LOW Register 0x40 42
- PWM_ONT_HIGH Register 0x41 42
- PWM_CFG Register 0x42 42
- CLOCK_DIV_CFG Register 0x43 43
- LOGIC_1_CFG Register 0x44 43
- LOGIC_2_CFG Register 0x45 43
- LOGIC_FF_CFG Register 0x46 44
- POLL_TIME_CFG Register 0x48 44
- PIN_CONFIG_A Register 0x49 45
- PIN_CONFIG_B Register 0x4A 45
- PIN_CONFIG_C Register 0x4B 45
- PIN_CONFIG_D Register 0x4C 46
- GENERAL_CFG_B Register 0x4D 46
- INT_EN Register 0x4E 47
- APPLICATION DIAGRAM 48
- OUTLINE DIMENSIONS 49
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