Universal Remote Control R7 - SPECS SHEET Manuel d'utilisateur Page 33
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Data Sheet ADP5589
Rev. B | Page 33 of 52
GPI_EVENT_EN_B Register 0x22
Table 42. GPI_EVENT_EN_B Bit Descriptions
Bits Name R/W Description
7 GPI_16_EVENT_EN R/W 0 = disable GPI events.
1 = allow GPI 16 activity to generate events on the FIFO.
6 GPI_15_EVENT_EN R/W 0 = disable GPI events.
1 = allow GPI 15 activity to generate events on the FIFO.
5 GPI_14_EVENT_EN R/W 0 = disable GPI events.
1 = allow GPI 14 activity to generate events on the FIFO.
4 GPI_13_EVENT_EN R/W 0 = disable GPI events.
1 = allow GPI 13 activity to generate events on the FIFO.
3 GPI_12_EVENT_EN R/W 0 = disable GPI events.
1 = allow GPI 12 activity to generate events on the FIFO.
2
GPI_11_EVENT_EN
R/W
0 = disable GPI events.
1 = allow GPI 11 activity to generate events on the FIFO.
1 GPI_10_EVENT_EN R/W 0 = disable GPI events.
1 = allow GPI 10 activity to generate events on the FIFO.
0 GPI_9_EVENT_EN R/W 0 = disable GPI events.
1 = allow GPI 9 activity to generate events on the FIFO.
GPI_EVENT_EN_C Register 0x23
Table 43. GPI_EVENT_EN_C Bit Descriptions
Bits Name R/W Description
[7: 3] Reserved.
2 GPI_19_EVENT_EN R/W 0 = disable GPI events.
1 = allow GPI 19 activity to generate events on the FIFO.
1
GPI_18_EVENT_EN
R/W
0 = disable GPI events.
1 = allow GPI 18 activity to generate events on the FIFO.
0 GPI_17_EVENT_EN R/W 0 = disable GPI events.
1 = allow GPI 17 activity to generate events on the FIFO.
GPI_INTERRUPT_EN_A Register 0x24
Table 44. GPI_INTERRUPT_EN_A Bit Descriptions
Bits Name R/W Description
7 GPI_8_INT_EN R/W 0 = GPI_8_INT is disable.
1 = GPI_8_INT enable. Assert the GPI_INT bit (Register 0x01, Bit 1) if GPI_8_INT is set and the GPI
interrupt condition is met.
6 GPI_7_INT_EN R/W 0 = GPI_7_INT is disable.
1 = GPI_7_INT enable. Assert the GPI_INT bit (Register 0x01, Bit 1) if GPI_7_INT is set and the GPI
interrupt condition is met.
5 GPI_6_INT_EN R/W 0 = GPI_6_INT is disable.
1 = GPI_6_INT enable. Assert the GPI_INT bit (Register 0x01, Bit 1) if GPI_6_INT is set and the GPI
interrupt condition is met.
4 GPI_5_INT_EN R/W 0 = GPI_5_INT is disable.
1 = GPI_5_INT enable. Assert the GPI_INT bit (Register 0x01, Bit 1) if GPI_5_INT is set and the GPI
interrupt condition is met.
3 GPI_4_INT_EN R/W 0 = GPI_4_INT is disable.
1 = GPI_4_INT enable. Assert the GPI_INT bit (Register 0x01, Bit 1) if GPI_4_INT is set and the GPI
interrupt condition is met.
2 GPI_3_INT_EN R/W 0 = GPI_3_INT is disable.
1 = GPI_3_INT enable. Assert the GPI_INT bit (Register 0x01, Bit 1) if GPI_3_INT is set and the GPI
interrupt condition is met.
1 GPI_2_INT_EN R/W 0 = GPI_2_INT is disable.
1 = GPI_2_INT enable. Assert the GPI_INT bit (Register 0x01, Bit 1) if GPI_2_INT is set and the GPI
interrupt condition is met.
- ADP5589 1
- TABLE OF CONTENTS 2
- SPECIFICATIONS 3
- ABSOLUTE MAXIMUM RATINGS 5
- QUICK DEVICE OVERVIEW 7
- 9714-004 7
- DEVICE ENABLE 8
- DEVICE OVERVIEW 8
- EVENT FIFO 9
- KEY SCAN CONTROL 9
- Rev. B 10
- KEY PRESSED 10
- 09714-009 10
- Data Sheet ADP5589 11
- ADP5589 Data Sheet 12
- Key Pad Extension 12
- Ghosting 12
- FIFO Lock/Unlock 12
- GPI Input 15
- REGISTER INTERFACE 19
- REGISTER MAP 21
- ID Register 0x00 23
- INT_STATUS Register 0x01 23
- Status Register 0x02 23
- FIFO_1 Register 0x03 24
- Rev. B 25
- Rev. B 26
- GPI_INT_STAT_A Register 0x13 27
- GPI_INT_STAT_B Register 0x14 27
- GPI_INT_STAT_C Register 0x15 27
- GPI_STATUS_A Register 0x16 28
- GPI_STATUS_B Register 0x17 28
- GPI_STATUS_C Register 0x18 28
- RPULL_CONFIG_A Register 0x19 29
- RPULL_CONFIG_B Register 0x1A 29
- RPULL_CONFIG_C Register 0x1B 30
- RPULL_CONFIG_D Register 0x1C 30
- RPULL_CONFIG_E Register 0x1D 31
- GPI_EVENT_EN_A Register 0x21 32
- GPI_EVENT_EN_B Register 0x22 33
- GPI_EVENT_EN_C Register 0x23 33
- DEBOUNCE_DIS_A Register 0x27 35
- DEBOUNCE_DIS_B Register 0x28 35
- DEBOUNCE_DIS_C Register 0x29 36
- GPO_DATA_OUT_A Register 0x2A 36
- GPO_DATA_OUT_B Register 0x2B 36
- GPO_DATA_OUT_C Register 0x2C 37
- GPO_OUT_MODE_A Register 0x2D 37
- GPO_OUT_MODE_B Register 0x2E 37
- GPO_OUT_MODE_C Register 0x2F 38
- UNLOCK1 Register 0x33 39
- UNLOCK2 Register 0x34 39
- EXT_LOCK_EVENT Register 0x35 39
- UNLOCK_TIMERS Register 0x36 40
- LOCK_CFG Register 0x37 40
- RESET1_EVENT_A Register 0x38 40
- RESET1_EVENT_B Register 0x39 40
- RESET1_EVENT_C Register 0x3A 41
- RESET2_EVENT_A Register 0x3B 41
- RESET2_EVENT_B Register 0x3C 41
- RESET_CFG Register 0x3D 41
- PWM_OFFT_LOW Register 0x3E 42
- PWM_OFFT_HIGH Register 0x3F 42
- PWM_ONT_LOW Register 0x40 42
- PWM_ONT_HIGH Register 0x41 42
- PWM_CFG Register 0x42 42
- CLOCK_DIV_CFG Register 0x43 43
- LOGIC_1_CFG Register 0x44 43
- LOGIC_2_CFG Register 0x45 43
- LOGIC_FF_CFG Register 0x46 44
- POLL_TIME_CFG Register 0x48 44
- PIN_CONFIG_A Register 0x49 45
- PIN_CONFIG_B Register 0x4A 45
- PIN_CONFIG_C Register 0x4B 45
- PIN_CONFIG_D Register 0x4C 46
- GENERAL_CFG_B Register 0x4D 46
- INT_EN Register 0x4E 47
- APPLICATION DIAGRAM 48
- OUTLINE DIMENSIONS 49
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